Chunk 1.0

In this chunk, the assistant verified that all 8 RTX PRO 6000 Blackwell GPUs (96 GB each) were visible and then focused on deploying the GLM-5-NVFP4 model using sglang. Initial installation of sglang 0.5.8.post1 was replaced by a build from the main branch to include the critical SM120 shared memory fix (PR #14311). The model’s `glm_moe_dsa` architecture required upgrading Transformers to 5.2.0, which was done. The server was launched with the recommended parameters from the HuggingFace model card, including tensor parallelism 8, FP4 quantization, and flashinfer attention backends. Despite successful model loading and CUDA graph capture, the server repeatedly crashed during decode with a `device-side assert triggered` error caused by NaN/Inf values in the probability tensor. The assistant traced this to two likely sources: a warning about DeepGemm being enabled with an incompatible checkpoint scale format (`ue8m0`), and a Transformers 5.2.0 warning about potential RoPE parameter incompatibilities. Multiple configuration attempts were made—switching attention backends (`triton`, `flashmla_sparse`), forcing `--fp8-gemm-backend cutlass`, disabling CUDA graphs, and trying `trtllm` NSA backends—but the NaN crash persisted. The assistant consulted the local research repository (`FINDINGS.md`), which documented previous successful NVFP4 deployments (Kimi K2-Thinking) on the same hardware and highlighted the DeepGemm scale format issue as a known problem on Blackwell. The latest attempt uses `--kv-cache-dtype auto`, `--disable-cuda-graph`, and explicit NSA backends (`trtllm`), and is currently loading. The overarching themes are the challenges of deploying cutting-edge quantized MoE models on new GPU architectures (SM120 Blackwell), the need for nightly/main branch builds of serving frameworks, and the iterative debugging of CUDA kernel compatibility and numerical accuracy issues.

The Blackwell Gauntlet: Deploying GLM-5-NVFP4 Across 8 GPUs Through Iterative Debugging 2176 words

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